PJRC Teensy 4.1 (with Ethernet chip)

PJRC
Teensy 4.1 (with Ethernet chip) development board photo
SpencerWF. Resized and converted to WebP. Source · CC0-1.0

Specifications

MCUIMXRT1062DVJ6
CoreArm Cortex-M7
Clock600 MHz
Flash8 MB on-board; top 256 KB reserved
RAM1024 KB (512 KB tightly coupled)
USBMicro-USB B
Logic voltage3.3 V
GPIO55
ADC18
PWM35
InterfacesUSB, UART, SPI, I2C, I2S, CAN, SDIO, Ethernet, QSPI
Form factorTeensy
Dimensions60.96 x 17.78 mm PCB (width ±0.6 mm; USB overhang 0.7 mm)
EcosystemsArduino, PlatformIO, CircuitPython

Resources

Sources